CPU SRAM Design Engineer, Senior - Cork, Ireland

Company:

QT Technologies Ireland Limited

Job Area:

Engineering Group, Engineering Group > CPU Engineering

General Summary:

Qualcomm is a company of inventors seeking to revolutionize the CPU market in an age of new possibilities. Are you interested in joining Qualcomm’s high performance CPU team as a Memory Designer? You will have the opportunity to work with some of the most talented and passionate engineers in the world to create designs that push the envelope on performance, energy efficiency and scalability. We offer a fun, creative and flexible work environment, with a shared vision to build products to change the world.

As a CPU SRAM Design Engineer, you will design, improve, and analyze digital circuits for memories. The role involves full ownership of custom SRAM and RF designs from schematic capture to analysis and model generation.

Minimum qualifications

● BA/BS degree in Electrical Engineering with 4+ years of practical experience ● Experience with designing SRAM circuits ● Experience in industry standard custom design tools and flows ● Experience with circuit simulation and monte carlo analysis. ● Experience with static timing analysis.

Preferred qualifications

● MS degree in Electrical Engineering ● Strong knowledge of SRAM and Register File techniques with advanced custom circuit implementations ● Strong knowledge of high-performance and low-power design features and techniques ● Strong knowledge of semiconductor device fundamentals ● Familiar with variation-aware simulation in FinFet and Nanosheet technology nodes ● Experience with custom memory layout designs ● Experience with all memory analysis steps including design entry, functional verification, layout guidance, simulation, timing, power and electrical characterization. ● Good understanding of physical implementation impact on circuit performance ● Proficiency with the following tools: NanoTime, Ansys EMIR analysis, ESP-CV, Liberate power analysis ● Experience with memory logical models (Verilog) and functional verification. ● Experience with BIST and other DFT features. ● Experience with memory analysis flow development and planning.

Roles and Responsibilities

● Develop custom digital circuits for high-speed and low-power SRAM designs ● Schematic capture ● Layout planning and supervision ● Functional verification ● Simulation and margin verification ● Timing characterization ● Performing analysis steps necessary to generate all deliverable collateral models ● Interacting with CAD team to ensure proper and efficient model generation ● Interacting with Physical Design team resolve memory PPA challenges ● Depending on skill set, aid the team with contributions to modeling, DFT and/or analysis flow development.