Sr Memory PHY Enablement
About this role
ADVANCE YOUR CAREER. ADVANCE THE WORLD.
At AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shaping the future.
Whether you’re designing next-gen processors, enabling AI breakthroughs, or bringing leading edge products to market, every role at AMD contributes to something bigger — technology that moves the world forward. Join us and, together, we’ll advance your career.
THE ROLE:
Memory PHY post-silicon validation engineer focused on first silicon bring-up within demanding product schedules. Memory PHY engineers develop and execute comprehensive test plans, analyze validation results, and debug issues as they arise. Engineers also enable and characterize memory features across PVT conditions and validate stability and robustness to support high-quality production.
THE PERSON:
You have strong knowledge of and interest in modern, complex processor architecture, digital design, and validation. You collaborate effectively with engineers across disciplines, locations, and time zones and communicate technical information clearly. You have strong analytical and problem-solving skills, can learn new technologies and tools, and use a structured approach to investigating complex engineering problems.
KEY RESPONSIBILITIES:
• Provide systems engineering and post-silicon support for HBM/DDR/LPDDR memory interface IP • Support bring-up of new products from first silicon in the lab through initial production • Triage observations from silicon validation and collaboration with ATE, Platform, Firmware, and Characterization teams to identify root causes and resolve issues • Provide post-silicon expertise and support in silicon design, process, and integration flows for memory interface IP • Engage in pre-silicon activities by developing comprehensive test plans and running them in emulation environments to ensure robustness • Characterize memory PHY across PVT to validate functionality and identify opportunities to improve power and performance
PREFERRED EXPERIENCE:
• Memory PHY validation experience, including familiarity with firmware and memory IP • Programming or scripting experience, with Python preferred, as well as firmware debugging experience and familiarity with Linux environments • Experience learning and applying new engineering toolsets, frameworks, and validation methodologies • Laboratory experience, including hands-on use of relevant equipment such as oscilloscopes, signal generators, BERT, and logic analyzers