Pre-Si Validation Engineer

Job Details:

Job Description:

The Role and Impact

Join Intel's cutting-edge team as a Formal Verification Engineer, where you will play a pivotal role in ensuring the quality and reliability of our next-generation IP and SoC designs. Your work will directly contribute to the delivery of innovative, high-performance solutions that drive Intel's success and leadership in the semiconductor industry.

As part of a collaborative and dynamic environment, you will work alongside architects, RTL developers, and physical design teams, applying state-of-the-art formal verification tools and methodologies to tackle complex architectural and microarchitectural challenges.

This is a unique opportunity to make a significant impact while advancing Intel's mission to shape the future of technology.

Key Responsibilities:

• Conduct formal verification of IP and SoC microarchitecture using advanced tools and methodologies based on model checking and equivalence checking algorithms. • Develop comprehensive formal verification test and coverage plans, including defining verification scope, strategy, and techniques. • Create abstraction models, carve boundaries for design, and track, verify, and apply abstraction techniques to ensure design convergence. • Develop and review formal proofs to implement the verification plan while continuously improving verification methodologies. • Perform convergence on designs by combining formal verification techniques with abstraction and simulation methods. • Identify and implement corrective measures to resolve failing tests, ensuring robust design functionality. • Collaborate closely with architects, RTL developers, and physical design teams to enhance the verification of complex architectural features. • Document and maintain test plans, driving technical reviews with design and architecture teams. • Maintain and improve the existing formal verification infrastructure and methodology. • Apply advanced understanding of modeling architectures, binary decision diagrams (BDD), and data flow graphs (DFG) to resolve design complexity, particularly on arithmetic pathways. • Utilize formal tools to prove protocols and architectures, simplifying and modeling problems with technical precision.

The ideal candidate should show the following behavioral traits:

• Demonstrated problem-solving skills. • Strong communication skills.

Qualifications:

Minimum qualifications, you must possess the below minimum qualifications to be initially considered for this position.